
Principal Designer, Layout
- Catania
- Tempo indeterminato
- Full time
- LDO, BUCK, BOOST, BUCK-BOOST, CHARGE-PUMP, SIMO (Single-Input / Multiple Outputs), IBB (Inverted BUCK-BOOST)
- Oscillators, PLL, Bandgap, References, ADC, DAC, I/O
- Layout Chip Lead
- Co-ordinate execution of large-scale mixed signal / PMIC chips
- Manage resourcing and scheduling for large project teams
- Interface across multiple disciplines, Design, Project Management, Assembly, ESD, Failure analysis,
- Provide and present customer facing documentation at key design reviews
- Interface directly with customers on key milestone deliveries and present weekly progress reports.
- Co-ordinate tapeout.
- Top Level Integration
- Execute top level integration of large-scale mixed signal and PMIC chips.
- Manage communication between IP owners and drive a top-down approach to top level integration.
- Interface with Digital Physical design to integrate large digital IP.
- Full verification sign-off with supporting documentation.
- IP Development
- Execute on IP Mask Layout Design
- Collaborate with IP Designers and understand sub-circuitry sensitivities
- Take responsibility/ownership for layout of large-scale sub blocks, including scheduling, Floorplanning, verification.
- Co-ordinate the workload for small layout sub teams within a larger project team.
- Preparation and delivery of customer facing material.
- Human Resources
- Support the development of a multi-disciplined team, including interviewing and recruitment support
- Provide Mentorship and technical leadership, setting up framework and structure for efficient development flows
- Enable a culture of continuous learning and improvement
- Support project management, task planning, schedule and resources
- Experience in use of Cadence Virtuoso IC61/IC18/IC20
- High proficiency in use of VXL
- Experience in use of Mentor Graphics Calibre
- Experience with Floorplanning large Blocks/Top levels
- Experience of Top-Down methodologies
- Experience of both AoT (Analog on Top) & DoT (Digital on Top) flows
- High proficiency in interpretation of LVS/DRC/ERC/ANTENNA/DENSITY/DFM
- Expertise in standard layout practices such as Layout matching, parasitic, noise & noise isolation, supply consideration, latch up, shielding, Well’s substrates and Isolation.
- Experience in laying out circuits for ESD consideration
- Excellent planning and organizational skills.
- Good interpersonal and communications skills.
- Ability to work well in a global team environment
- Ability to work independently
- Ability to work with the design team to minimize layout re-work by improving processes, checklists, documentation
- Scripting skills in PERL or SKILL considered an advantage
- PCELL creation experience considered an advantage
- Good written and verbal communication
- BE/BSc Electronic Engineering or equivalent
- 15 years’+ experience in IC Layout
- Scripting skills in PERL or SKILL or AMPLE are considered a plus, but not required
- Good team worker with multi-discipline, multi-cultural and multi-site environments
- We place great value on individual judgment
- We allow our employees the freedom to explore new ideas and the autonomy to determine how to best achieve business goals and objectives
- We emphasize professional development and mentoring
- Above all, we recognize that the personal goals of our employees and the company’s goals are closely related and must support each other